TEK Microsystems QuiXilica Calypso-V6 Digitizer

TEK Microsystems introduced their QuiXilica Calypso-V6 digitizer. The Calypso-V6 features four separate ADC devices, with each pair of devices assigned to its own front end FPGA for signal processing. The front end FPGAs can be configured with LX240, SX315, or SX475 devices. The new QuiXilica digitizer offers the highest FPGA processing density available in any 6U form factor. It is also the only VME / VXS platform that supports Virtex-6 FPGA devices. The TEK Calypso-V6 will be available in January 2011.

TEK Microsystems QuiXilica Calypso-V6 digitizer

The QuiXilica Calypso-V6 digitizer supports two 12-bit analog-to-digital converter (ADC) channels at 3.6 GSPS (Gigasamples per second) or six channels at 1.8 GSPS. The Calypso-V6 It combines the highest density FPGA processing available in any 6U form factor with ultra wide band ADC signal acquisition. It is compatible with legacy VME systems and the newer ANSI/VITA 41 VXS based systems. The Calypso-V6 is supported by a Developer’s Kit that includes interface IP cores for all onboard resources and Tekmicro’s QuiXtream network toolkit for rapid application development using network-enabled FPGAs. Reference designs with source code are included.

TEK QuiXilica Calypso-V6 digitizer block diagram

QuiXilica Calypso-V6 Digitizer

  • Supports ultra wide band signal acquisition
  • Based on the National Semiconductor ADC12D1800RF device
  • Includes four ADC devices, supporting a total of either six channels plus trigger at 1.8 GSPS or two channels plus trigger at 3.6 GSPS
  • Each pair of ADC devices are assigned to its own front end FPGA for signal processing
  • Front end FPGAs can be configured with LX240, SX315, or SX475 devices
  • Highest FPGA processing density available in any 6U form factor today
  • Only VME / VXS platform to support Virtex-6 FPGA devices
  • Two front end FPGAs are supplemented with a backend FPGA, which can be used for additional processing or for backplane or front panel communications
  • Backend FPGA can be configured with a range of Xilinx Virtex-6 FPGA options, from the standard LX240 up to a SX475
  • Includes six banks of DDR3 memory with total capacity of 5 GB and aggregate throughput of 32 GB/s
  • Backend FPGA also has two banks of QDR-II memory available for applications that require memory with lower random access latency
  • Each FPGA supports a Gigabit Ethernet interface for control plane purposes
  • Converters provide 12-bit resolution and full power bandwidth up to 2.7 GHz in all modes
  • Can be used as a 3.6 GSPS converter for 1st Nyquist applications or as a high density multichannel building block for lower bandwidth applications using either 1st or 2nd Nyquist sampling
  • Includes sample-accurate trigger synchronization in all modes
  • Enables coherent processing of multiple input channels both within a single card and across multiple cards
  • Enables applications of up to 108 channels to be supported within a single chassis
  • GPS and timestamp inputs are also available to support precise timing and geolocation
  • Range of front panel and backplane I/O connections for high speed communications with other processing cards
  • Onboard Gigabit Ethernet switch for network connectivity between the front panel, backplane interface, and all onboard FPGAs
  • Based on Tekmicro’s QuiXilica-V6 baseboard
  • Dedicated system management processor can be used to monitor power and thermal sensors
  • Available for a wide range of operating environments, including commercial grade, rugged air and conduction cooled
  • Can be used for both laboratory and deployed requirements in both VME and VXS systems

More info: TEK Microsystems