Actel Libero v8.1

Actel Corporation recently released version 8.1 of its Libero(TM) Integrated Design Environment (IDE) power optimization and analysis tools for its low-power flash FPGA families. The new version of Libero supports all of the company’s low-power families, including the ultra low-power Actel IGLOO FPGAs and the mixed-signal Actel Fusion Programmable System Chips (PSCs). The Actel Libero IDE 8.1 Platinum edition is available on Windows and Linux platforms for $2495. A limited feature Gold edition is available on Windows for free. All editions are one-year renewable licenses.

A new option in Libero actively utilizes SmartPower’s design analysis data for power-driven layout, which enables users to quickly realize dynamic power savings through the reduction of the capacitive loading of the nets. While average IGLOO power consumption is reduced by 13%, some designs can reduce consumption by as much as 30%.

New features include:

  • Power-driven layout reduces dynamic power by as much as 30%
  • Battery life estimation aids designers of portable, battery-operated applications
  • Enhanced SmartPower analysis enables power efficiency in portable designs

With Libero IDE v8.1, SmartPower provides designers the ability to create power profiles to help estimate necessary power supply and battery requirements. Defined by the user, the power profile is the percent of time the FPGA will be in a combination of custom or functional modes, such as Active, Standby, or Flash*Freeze. To provide battery life estimation for portable or handheld designs, for example, the user inputs the desired battery’s current capacity as well as the power profile of the FPGA. SmartPower then displays the expected battery life as well as a realistic and accurate report of power consumption based on the true power profile of the target FPGA.

The Libero IDE v8.1 also features enhanced SmartPower functionality, which enables analysis of the entire FPGA as well as specific portions of the device or design, such as clock domains, switching cycles, and spurious transitions, which individually contribute to overall power consumption of the device. A cycle-accurate power analysis option, for example, allows designers to look at peak power per clock cycle as well as the average power for the entire simulation.

More info: Actel Libero