Altera Corporation (NASDAQ:ALTR) announced the Stratix® IV FPGAs and HardCopy IV ASICs, which are the industry’s first 40-nm FPGAs and HardCopy® ASICs. The Stratix IV family has up to 680K logic elements (LEs), 2X bigger than Altera’s Stratix III family. The HardCopy IV ASIC family offers equivalent densities as the Stratix IV devices and features up to 13.3 million gates. Altera® 40nm devices meet the diverse high-end application needs in a large number of markets such as wireless and wireline communications, military, broadcast and ASIC prototyping. Engineering samples of the first member of the Stratix IV device family will be available in the fourth quarter of 2008. Customer tapeouts for HardCopy IV ASICs will start in the third quarter of 2009.
Stratix IV FPGA Benefits
- Highest density with up to 680K logic elements (LEs), 22.4 Mbits of embedded memory, and 1,360 18 x 18 multipliers
- Highest performance with a 2 speed grade advantage and the industry’s most advanced logic and routing architecture
- Unprecedented system bandwidth with up to 48 high-speed transceivers at up to 8.5 Gbps and 1,067 Mbps (533 MHz) DDR3 memory interfaces
- Lowest power with up to 50 percent lower power than any other high-end FPGA in the market enabled by 40-nm benefits and Programmable Power Technology
- Hard intellectual property (IP) for PCI Express Gen1 (2.5 Gbps) and Gen2 (5.0 Gbps) with up to four x8 blocks delivering a full endpoint or root-port function
- Superior signal integrity with the ability to drive a 50″ backplane at 6.375 Gbps with Plug & Play Signal Integrity
HardCopy IV ASIC Benefits
- One design, one register transfer level (RTL), one IP set, and one tool (Quartus® II software) delivers both FPGA and ASIC implementations
- Lowest risk and lowest total cost
- Higher levels of system integration and innovation
Manufactured on TSMC’s 40-nm process, the Stratix IV FPGA family is comprised of two variants, an enhanced variant rich with memory and digital signal processing (DSP) resources (Stratix IV E FPGAs) and an enhanced variant with transceivers (Stratix IV GX FPGAs). Stratix IV GX FPGAs offer up to 48 transceivers operating at up to 8.5 Gbps, which provides designers with the industry’s highest available bandwidth, more than twice the bandwidth of any other FPGA. Stratix IV GX FPGAs also feature hard intellectual property (IP) support for PCI Express (PCIe) Gen 1 and 2 and also supports a wide range of protocols including, Serial RapidIO®, XAUI (including DDR XAUI), CPRI (including 6G CPRI), CEI 6G, Interlaken and Ethernet.
To address the low-power demands of customers, the Stratix IV family members feature Altera’s patented Programmable Power Technology. This power-saving technology optimizes logic, DSP and memory blocks to maximize performance where needed while delivering the lowest power elsewhere in the design.
Altera offers a transceiver-based ASIC option with the new HardCopy IV ASIC family. Using the Stratix FPGAs in design delivers the benefits of FPGA hardware and software co-design and co-verification — saving months in time to market — and the use of HardCopy ASICs delivers the benefits of ASICs in production.