Altera Cyclone V GX FPGA Development Kit for 28nm Designs

Altera Cyclone V GX FPGA development board

Altera recently introduced their Cyclone V GX FPGA development kit. It is based on the industry’s lowest-power, lowest-cost 28nm FPGA. Altera’s 28nm development kits increase designer productivity by offering the tools and resources necessary to get 28nm FPGAs developed and integrated into systems. The 28 nm development kits include FPGA boards, hardware and cables, and development software that provide access to a variety of IP cores, reference designs and documentation. The Altera Cyclone V GX FPGA Development Kit is available now for $1,199.

The low-power, low-cost is the industry’s first 28nm development kit for low-cost designs. It offers a quick and simple approach to developing system-level designs for industrial networking, surveillance cameras and automotive infotainment systems applications. The Cyclone V GX FPGA development kit supports a variety of functions, including FPGA prototyping, FPGA power measurement and transceiver testing. The Altera kit also includes a PCIe reference design that reduces the development of PCIe-based systems.

Altera Cyclone V GX FPGA Development Kit

  • Cyclone V GX FPGA development board
  • Cyclone V GX FPGA – 5CGXFC7D6F31C7NES
  • MAX V CPLD – 5M2210ZF256C4N (system controller)
  • MAX II CPLD – EPM240M100C4N (embedded USB-Blaster II)
  • MAX II CPLD – EPM240M100C4N (optional, third party security CPLD feature)
  • Embedded USB-Blaster II (JTAG)
  • Fast Passive Parallel (PFL)
  • Two banks x40-bit DDR3 SDRAM with error correction code (ECC)
  • 512MB flash memory and 18MB SRAM
  • USB 2.0
  • Gigabit Ethernet
  • PCIe x4 Edge Connector
  • Universal high-speed mezzanine card (HSMC) (x 4 Xvcrs, x16 Tx LDVS, x16 Rx LVDS)
  • Serial digital interface (SDI) channel
  • Two SMAs for one transceiver channel
  • Push buttons, DIP switches and LEDs
  • Programmable clock generator for FPGA reference clock input
  • 125-MHz LVDS oscillator for FPGA reference clock input
  • 148.5/148.35-MHz LVDS VCXO for FPGA reference clock input
  • 50-MHz single-ended oscillator for FPGA and MAX V FPGA clock input
  • 100-MHz single-ended oscillator for MAX V FPGA configuration clock input
  • SMA input (LVPECL)
  • Laptop DC Input 14 – 20V adapter
  • PCIe Edge Connector
  • PCIe card standard size (6.600″ x 4.199″)
  • PCIe loop back and reference design
  • Board test system (BTS)
  • Board update portal (BUP)
  • Includes Nios II embedded soft processor and Ethernet
  • Complete documentation
  • Free software supported by Quartus II software v12.0 SP2, Web Edition

More info: Altera Cyclone V GX FPGA Development Kit (pdf)