Microsemi Offers Private Label Program for SmartFusion cSoC and FPGA
Microsemi announced a private labeling program for their SmartFusion customizable system-on-chip (cSoC), and flash and antifuse-based FPGA solutions. Microsemi’s new private label program enables companies to rapidly deliver economical and differentiated system-on-chip solutions. With the company’s SmartFusion cSoC devices, engineers can reduce the size of their circuit boards and the external bill-of-material component count while at the same time increasing the mean time between failure.
Microsemi Offers Private Label Program for SmartFusion cSoC and FPGA »
Kontron FMC-SER0 FPGA Mezzanine Card and KIT-FMC-DEV VITA 57 FMC Development Kit
Kontron rolled out the FMC-SER0 FPGA Mezzanine Card and the KIT-FMC-DEV VITA 57 Development Kit. The Kontron FMC-SER0 is an FMC HPC single-width module. It is designed to interface with any VITA 57 host board. The Kontron VITA 57 Development Kit KIT-FMC-DEV enables designers to use the Kontron FMC-SER0 as a reference design. All Kontron VITA 57 products are available now. They can be ordered directly off the shelf or as customized application ready platforms and can be bundled with Kontron’s long term supply program, which guarantees customers multi-year supply of the product beyond its active life.
Kontron FMC-SER0 FPGA Mezzanine Card and KIT-FMC-DEV VITA 57 FMC Development Kit »
Ben Heck Show Brightens Up LED Displays with FPGAs and CPLDs
In the latest Ben Heck Show episode, the modding guru discusses the benefits of using Field Programmable Gate Arrays (FPGAs) and Complex Programmable Logic Devices (CPLDs) to enhance LED-illumination projects. In the episode, Ben deconstructs the complex language of programmable logic devices as a means to help designers expedite their current builds as efficiently as possible.
Ben Heck Show Brightens Up LED Displays with FPGAs and CPLDs »
World’s Fastest 8051 CPU: Quad-Pipelined Microcontroller IP Core
Digital Core Design announced the DQ80251 Core. It is a quad-pipelined, speed optimized soft core of a 16-bit/32-bit embedded microcontroller. The DCD DQ80251 IP core is the world’s fastest 8051 microprocessor solution. With a confirmed Dhrystone 2.1 benchmark, the DQ80251 IP core is up to 56.8 times faster than the original 8051 and 4.81 times faster than the original 80C251 at the same clock frequency. The DQ80251 includes a fully automated testbench and a complete set of tests.
World’s Fastest 8051 CPU: Quad-Pipelined Microcontroller IP Core »
Trenz Electronic TE0630 Series of FPGA Modules
Trenz Electronic introduced their TE0630 family of FPGA-based industrial micro-modules. The TE0630 features a Xilinx Spartan-6 FPGA, mini-USB 2.0 device port, 1 Gbit (128-Mbyte) DDR3 SDRAM with 16-bit width, 8 Mbyte Flash memory for configuration and operation, and switch-mode power supplies for all on-board voltages. The Trenz TE0630 board is available in different options. It is ideal for harsh environments and pervasive deployment.
Sercos III Real-time Ethernet Solution Features LatticeECP3-35 FPGA
Lattice Semiconductor recently introduced their Sercos III real-time Ethernet solution. The Sercos III solution features the Lattice FPGA device. It is a low cost, low power FPGA-based alternative for engineers who need to implement flexible industrial networking solutions. Sercos is a digital bus that interconnects motion controls, drives, I/O, sensors and actuators for numerically controlled machines and systems. It is designed for the high-speed serial communication of standardized closed-loop real-time data over Industrial Ethernet.
Sercos III Real-time Ethernet Solution Features LatticeECP3-35 FPGA »
LatticeECP4 FPGA Family
Lattice Semiconductor introduced their LatticeECP4 FPGA family. The next generation FPGA devices feature 6 Gbps SERDES, low cost wire-bond packages, powerful DSP Blocks and hard IP-based Communication Engines for cost- and power-sensitive wireless, wireline, video and computing applications. Samples of the LatticeECP4 devices will be available in the first half of 2012 and high-volume production delivery is scheduled for the second half of 2012. The LatticeECP4 FPGAs are ideal for remote wireless radio heads, distributed antenna systems, cellular basestations, ethernet aggregation, switching, routing, industrial networking, video signal processing, video transmission and data center computing.
Serial RapidIO Gen 2 v1.2 Endpoint, CPRI v4.1, and JESD204B v.1.1 IP Cores
Xilinx recently introduced the Serial RapidIO Gen 2 v1.2 Endpoint LogiCORE, CPRI v4.1 LogiCORE, and JESD204B v.1.1 LogiCORE IP cores. The Xilinx three LogiCORE IP cores support connectivity standards and will help developers address design challenges in building new wireless equipment with higher system capacities. The Serial RapidIO Gen 2 v1.2 Endpoint LogiCORE IP, JESD204 v1.1 LogiCORE IP , and CPRI v4.1 LogiCORE IP are ideal for building programmable, flexible and cost effective 3G+/4G wireless base stations. They are available in Xilinx’s ISE Design Suite 13.3 and can be evaluated free of charge.
Serial RapidIO Gen 2 v1.2 Endpoint, CPRI v4.1, and JESD204B v.1.1 IP Cores »
Webinar: How to Achieve the Highest NAND Flash Application Data Rate
CAST and Evatronix will host a webinar about using CAST’s new NAND Flash Controller Core as part of an overall design strategy to achieve the highest possible memory data input and output rates for advanced applications. The webcast will take place Wednesday, November 30, 2011 at 1:00 PM EST. The online seminar is free, but you need to register in advance.
Webinar: How to Achieve the Highest NAND Flash Application Data Rate »
Altera Stratix IV FPGAs Accelerate Novo-G Reconfigurable Supercomputer
The Center for High-Performance Reconfigurable Computing (CHREC) updated their Novo-G supercomputer with Altera Stratix IV FPGA devices. As a result, CHREC increased the system memory and acceleration of the world’s most powerful supercomputer by a factor of two. CHREC was able to realize a greater performance-to-cost ratio with modest increases in size, power and cooling.
Altera Stratix IV FPGAs Accelerate Novo-G Reconfigurable Supercomputer »
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